Digital electronics has replaced analog electronics in numerous applications during the last decades because it brings performance improvements but also reduces cost and size. Digital control of switching power converters is a relatively new field because semiconductor technology did not enable effective implementations before. In the field of alternating current (AC) power supplies, digital control allows significant performance improvements, such as lower distortion in the generated waveform, superior measurement accuracy, better stability and protection schemes, and gives flexibility to change operating parameters in real time.
In fully digital controlled power converters, a microprocessor or gate array implements all the control loops and directly defines the transistors switching. It presents several advantages, such as accuracy, stability and flexibility, but also numerous technical challenges, such as speed and measurement resolution, and that is why it had not been widely adopted until recently.
Distortion and offset drift in the signal conditioning and acquisition are critical parameters for AC power supplies, in particular, when working as voltage source (i.e. controlled output voltage). Certain types of loads require ultra-low DC levels. For example, transformers and inductors have low impedance at low frequency, hence any offset or asymmetry (even-number harmonics) in the voltage causes undesired DC currents. Typical programmable high power AC supplies require a maximum offset of less than +/−20 ppm of the full scale voltage measurement, this is +/−20 mV in a 1000V range (+/−500V).
Prior art requires the use of ultra-low offset signal conditioning and high resolution ADCs to acquire this signal, which presents technical challenges due to the speed and bandwidth required by the voltage feedback and measurements calculations. High speed and high accuracy at the same time causes significant increments in cost, size and system complexity.
For example, parallel output bus (as opposed to serial) ADCs must be used to avoid excessive data transfer delays, and this has several impacts:
1). Substantially reduces the pool of off-the-shelf integrated circuits that can be used for both ADCs and microprocessors.
2). Increases circuit complexity and size due to the size of the packages and number of digital signals in the bus.
3). Increases cost because of the resultant complexity in circuits and price of electronic devices.
Even when using 16-bit ADCs with best-in-class linearity levels (e.g. integral non linearity of 1 LSB), the maximum error is in the order of the maximum allowed, thus making it not a reliable solution. Using the same application example of a full range of +/−500V, a 16-bit ADC gives a resolution of 15 mV, with a maximum non-linearity error of the same level.
Even if the ADC had zero-offset (e.g. by use of internal chopping), it still requires conditioning stages to prepare the analog signal to be sampled and converted as illustrated in FIG. 3 that addresses the prior art. In FIG. 3, an HVAC source (60) is connected to resistors (62) that in turn are connected to a differential amplifier circuit (64). The output of the amplifier (64) is input to a sample and hold/ADC circuit (66). The voltage measurement signal is conditioned and then converted to digital to be used by the processor. The analog signal conditioning and ADC input can also be differential to eliminate effects of common mode errors. In the circuit of FIG. 3, any offset added by signal conditioning circuits (62) will not be cancelled by zero-offset techniques of the ADC circuit (66).
Prior art created competitive solutions by using non-programmable digital controllers that implement control loops with digital logic, and use low cost ADCs to digitize the signals from the power stage. Some commercial ICs (e.g. Texas Instruments, UCD9222 digital controller) use very low resolution ADC (6 bit) to digitize the error signal, instead of converting to digital the voltage feedback, to be used by the control loop. It first converts from digital to analog the voltage reference, then calculates the error in the analog domain and finally converts to digital the error signal. Since the error signal is expected to have a small amplitude when the loop is regulating, the input range of the ADC can be small and that makes even a low resolution enough to regulate the output voltage in modest performance applications.
Considerable effort has been spent to reduce cost and optimize the analog to digital conversion in digitally controlled switching converters as identified in FIG. 1 (excerpt from of U.S. Pat. No. 7,554,310 to Chapuis et al). This figure depicts a switched mode voltage regulator 10 having a conventional digital control circuit. The voltage regulator 10 comprises a buck converter topology to convert an input DC voltage Vin to an output DC voltage Vo applied to a resistive load (20) (Rload). The voltage regulator (10) includes a pair of power switches (12), (14) provided by MOSFET devices. The drain terminal of the high-side power switch (12) is coupled to the input voltage Vin, the source terminal of the low-side power switch (14) is connected to ground, and the source terminal of power switch (12) and the drain terminal of power switch (14) are coupled together to define a phase node. An output inductor (16) is coupled in series between the phase node and the terminal providing the output voltage Vo, and a capacitor (18) is coupled in parallel with the resistive load Rload. Respective drivers (22), (24) alternatingly drive the gate terminals of the power switches (12), (14). In turn, digital control circuit (30) controls operation of the drivers (22), (24). The opening and closing of the power switches (12), (14) provides an intermediate voltage having a generally rectangular waveform at the phase node, and the filter formed by the output inductor (16) and capacitor (18) converts the rectangular waveform into a substantially DC output voltage Vo. The voltage feedback of the loop is attenuated by a resistive divider (26 and 28) to be compared against the reference. A difference circuit (32) calculates the error, which is an analog signal that is then converted to digital by an ADC (34), coupled to a compensator (36), which is coupled to a digital pulse-width-modulator (38) that controls the transistor drivers (22 and 24).
The above mentioned techniques represent convenient solutions for low-cost and modest performance converters, often DC to DC converters with fixed or slow varying setpoints. In case of programmable AC sources, the actual output voltage signal needs to be converted with high accuracy because it is required by the control loop and also the measurement circuits for monitoring purposes. Hybrid techniques (e.g. DAC+ADC) do not represent convenient solutions for high frequency AC supplies because of their impact in accuracy, bandwidth and transient response.
In the field of high precision analog electronics, amplifying and processing signals with high DC accuracy has been a challenge due to offset and drift in the analog circuits. A technique often referred as chopping is a well-known and widely adopted to reduce or eliminate offset and drift in certain types of applications.
FIG. 2 shows a simplified block diagram of a conventional chopped amplifier (40). A low frequency input voltage (42), usually low level signal, is required to be amplified without adding DC error. A first modulation block (44) (often implemented with analog switches) converts the input signal to a high frequency square wave (46) with positive and negative peak values equal to the input voltage. The amplifier (48) introduces a gain G to the AC signal and also adds an undesired offset Voff, which can also drift with temperature and/or time. The output of the amplifier is demodulated to convert it back to low frequency and then filtered with a low pass filter (50). Any DC component added by the amplifier is converted to AC by the demodulator stage, and the low pass filter (50) is required to filter out this component.
Chopping and similar techniques are widely used in precision instruments (“The Art of Electronics”, third edition, 2015, ISBN-13: 978-0521809269, ISBN-10: 0521809266), integrated operational amplifiers (Walter G. Jung, “Op Amp Applications Handbook”, Analog Devices, 2002, ISBN 0-916550-26-5, ch. 1, p. 1.98), thermocouple based measurement and sensor bridges, among other applications. Similar techniques are referred as chopper-stabilized amplification, synchronous detection, and modulation/demodulation.
Chopping can also be used in mixed signal circuits in order to obtain offset-free analog to digital conversions. Application Note 1132 from Analog Devices describes how chopping is used in sigma delta ADCs to measure slow changing signals. These converters are typically low speed (i.e. less than 5 ksps) and require a low pass filter at the output. Prior art presents a number of inventions related to the design of high precision analog to digital converter integrated circuits.
U.S. Pat. No. 6,411,242 (2002): Proposes a method to improve the DC offset performance of oversampling analog to digital converters by using chopping in the analog section and sequentially demodulate the output by using the decimator, which is required because of the oversampling.
U.S. Pat. No. 7,098,823 (2006): Addresses the optimization of the chopping rate in the analog section of analog to digital converter ICs
U.S. Pat. No. 7,551,110 (2009): Claims an IC with direct connection to the sensor, with chopping, oversampling at substantially higher frequency than the chopping, and then a sequential demodulation. It proposes adding an intermediate low pass filter to eliminate high frequency noise.
U.S. Pat. No. 7,907,076 (2011): Applies analog chopping and digital demodulation to inside a sigma delta ADC.
The above mentioned prior art differs from the present invention mainly, but not exclusively, in the following ways:
1) They are all applied to IC design. In AC power supplies, the high voltage is required to be attenuated down to reasonable IC voltage levels (3 to 5V) by using signal conditioning. Signal conditioning at low voltage levels can add undesired offset and distortion close to the rails. As described in a preferred embodiment of this invention, it is convenient to perform the modulation at higher voltage levels to minimize or eliminate the impact of signal conditioning offset and distortion.
2) The demodulation is done by averaging or filtering two or more samples, introducing extra delay or phase lag in the conversions. Furthermore, since the two samples of each switch state are not taken at the same time, this also creates an artificial offset error due to ripple in the voltage reference, bias supply, or coupled noise synchronized with the chopping signal.
As is described in the preferred embodiment of this invention, in order to obtain sub-LSBs (least significant bit) offset accuracy, resolution and stability, a scheme with simultaneous, fully differential conversion is implemented by means of two parallel sample and hold circuits, referred here as dual acquisition.
3) Prior art addresses and solves the most common application of measuring a slow changing signal with high DC accuracy. The application that this invention addresses differs because it consists of the measurement of a large AC signal that covers the whole ADC range, but with a required DC precision smaller than 1 LSB. This application also requires any non-linearity to be compensated in a way that does not cause asymmetries between positive and negative signals, often referred as even-number harmonics.
Because of the above mentioned reasons, it is desirable to use low cost, medium accuracy ADCs that are usually smaller and can be found embedded in the same IC as the microcontroller or digital signal processor.